Chips with cavity packages have a similar structure to a conventional chip with the exception that a portion of the lid or cover glass of the package is offset from the surface of the chip, forming a cavity. A common application for chips with cavity packages is for image sensor chips commonly used in such devices as cell phones. The cavity of image sensor chips contains components including micro lenses, color filters, and sensors in the cavity. In the case of an image sensor chip, a glass layer is placed over the front side of the image sensor chip, with a polymer spacer between the glass and the image sensor chip, around the perimeter of the array. Note that the polymer spacer is absent from the array. This structure protects the components placed in the cavity while simultaneously allowing light to reach the components.
Referring to FIG. 1, the polymer layer 14 that forms the cavity 16 prevents connective wiring (i.e. such as a wire bond) access to the top wiring layer 12. Referring to FIG. 2, in order to access the top wiring layer 12, after the chip is diced, package leads 26 are placed along the side of the chip that make lateral connections with the top wiring layers 12. A bond pad 28 is the area of connection of the top wiring layer 12 and the package lead 26. The bond pad 28, via the package lead 26, connects the image sensor chip 2 to other circuits in the camera.
The top wiring layer is preferably thin—approximately less than one (1.0) micron. Thin top wiring layers maximize the image sensor chip's sensitivity to light. At the same time, the lateral connections formed between the package leads on the side of the chip and the thin top wiring layers create connections with high resistance due to the small cross-sectional area of the thin top wiring layers and the package leads. Therefore, there is a conflict in the requirements of the thickness of the top wiring layer. On the one hand, thick top wiring layers result in thick bond pads, of approximately one (1.0) micron or more, permitting better package lead connections with lower resistance, while on the other hand, thin top wiring layers, of approximately less than one (1.0) micron, permit finely spaced and narrow wires.